debugging - fpscr register is not updated when enabling floating point exceptions on arm7, SIGFPE not generated -


fpscr register not updated , sigfpe not generated. tested on nvidia shield tablet , 1st gen nexus 7.

feenableexcept(fe_divbyzero | fe_invalid | fe_overflow);

the implementation calls code, executes assembly:

  asm _volatile__("vmsr fpscr,%0" : :"ri" (fpscr));   ; disassembly follows   ldr r3, [r11, #-8]    vmsr fpscr, r3

vmsr fpscr not update. remains 0x20000010 when should updated 0x20000710.

tested -mfloat-abi=soft , -mfloat-abi=softfp.

what can conclude?

the arm arm has exception-trapping bits in fpscr:

[...]. bit rw if implementation supports trapping of floating-point exceptions. in implementation not support floating-point exception trapping, bit res0.

the tegra k1 soc in shield tablet has cortex-a15 cpus, don't support vfp exception trapping.

the tegra 3 soc in original nexus 7 has cortex-a9 cpus (with vfp+neon implementation), don't support vfp exception trapping

what particularly unhelpful userspace can't access mvfr0 feature register find out programatically.

i think can conclude don't have hardware supports trapped exceptions ;)


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